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Subject Item
dbpedia:SystemVerilog
rdfs:comment
In the semiconductor and electronic design industry, SystemVerilog is a combined hardware description language and hardware verification language based on extensions to Verilog.
foaf:name
SystemVerilog
dbpedia-owl:influencedBy
dbpedia:Verilog dbpedia:OpenVera
dbpedia-owl:latestReleaseVersion
IEEE 1800-2012