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Subject Item
dbpedia:Verilog
rdfs:comment
Verilog, standardized as IEEE 1364, is a hardware description language (HDL) used to model electronic systems. It is most commonly used in the design and verification of digital circuits at the register-transfer level of abstraction. It is also used in the verification of analog circuits and mixed-signal circuits.
foaf:name
Verilog
dbpedia-owl:influenced
dbpedia:SystemVerilog
dbpedia-owl:latestReleaseVersion
IEEE1364-2005